Europe’s aspiration to enhance its semiconductor and electronics value chains is clearly outlined in the European Chips Act. Going beyond mere investments in manufacturing capacity and research infrastructures, the Chips Act acknowledges the critical challenge of transforming ideas, architectures, and system concepts into functional devices on silicon.
For many European companies, especially SMEs, deep-tech startups, and system houses, the main obstacle is not creativity but access to design execution capability. Advanced SoC development, mixed-signal integration, RF, photonics, and emerging More-than-Moore technologies demand specialized workflows, reusable IP, experienced teams, and early prototyping paths. Independently building this capability is time-consuming, capital-intensive, and can divert attention from core business objectives.
To bridge this gap, the Chips Act introduced Design Enablement Teams (DETs) as part of the broader European Chip Design Platform (EuroCDP). DETs serve as structured entry points into Europe’s semiconductor ecosystem, connecting users to real design execution and streamlining the path from concept to demonstrator.
Within this European framework, VUO-IC stands as Finland’s national Design Enablement Team, uniting universities, research organizations, and commercial design houses in a coordinated delivery model.
The Role of Design Enablement Teams
DETs are designed to facilitate chip delivery, not just designs, at their core. This sets them apart from advisory services or purely academic support structures. A Design Enablement Team typically offers a single entry point for users with chip aspirations, assesses technical feasibility, connects users to the right resources, supports execution through traceable workflows, and plans the path to prototypes and first silicon.
DETs are structured to function across organizational boundaries, translating high-level policy goals into practical support for companies navigating hardware product development under commercial constraints.
VUO-IC: Finland’s Design Enablement Team
VUO-IC, Finland’s EuroCDP Design Enablement Team, is dedicated to assisting users in delivering tangible chips – from system architecture and design implementation to prototypes and initial silicon learning – via a unified service model integrating university-scale SoC capabilities, industrial design expertise, and national prototyping opportunities.
VUO-IC distinguishes itself within the European DET landscape by its focus on facilitating complex digital SoC delivery. Rather than concentrating solely on small-scale demonstrations or isolated IP components, VUO-IC is positioned to support large-scale, system-level designs where complexity presents a significant hurdle.
This proficiency is rooted in Tampere University, providing a production-grade design environment and workflows tailored for complex SoCs. Additionally, the university offers SoC templates, reusable building blocks, and essential low-level software knowledge often overlooked but crucial for expediting advanced design processes.
CoreHW and VLSI Solution, two well-established Finnish design firms, contribute industrial-grade execution. CoreHW brings extensive RF and mixed-signal expertise along with a robust IP portfolio, while VLSI Solution adds comprehensive ASIC delivery experience from design to production, evidenced by longstanding commercial success and large-volume shipments. Their involvement ensures alignment of designs within VUO-IC with real manufacturing and productization requirements from the outset.
VTT enhances this foundation with advanced RTO capabilities in RF, mmWave, photonics, and quantum and cryogenic CMOS technologies. VTT also serves as a gateway to prototyping infrastructures, facilitating the integration of emerging technologies into practical chip development pathways.
Chip Fusion oversees coordination and orchestration, managing intake, case routing, and delivery supervision. Through its leadership in Finland’s semiconductor coordination structures, Chip Fusion connects VUO-IC to the broader national ecosystem, simplifying navigation through complex institutional landscapes for users.
A Service Model Focused on Execution
VUO-IC operates on a structured, case-based service model rather than open-ended consulting, ensuring users engage with defined service steps throughout the chip lifecycle, from initial feasibility assessment to tape-out readiness and prototyping planning.

All engagements commence with a single front door managed by Chip Fusion, ensuring each case is efficiently triaged and directed to the appropriate execution teams with clear ownership, preventing project delays between organizations. The documented workflow of scoping, activation, delivery, and closure captures assumptions, constraints, and decisions explicitly.
A key feature of the VUO-IC model is the early planning of the prototype path. Considerations related to MPW access, packaging, testing, interfaces, and bring-up are addressed from the outset rather than after design completion, reducing late-stage surprises and increasing the likelihood of achieving a functional device on silicon.
In cases requiring additional infrastructure, such as pilot lines, specialized packaging or testing, or domain-specific expertise, VUO-IC coordinates access through its consortium and Finland’s broader ecosystem, offering users a cohesive path instead of fragmented contacts.
Significance for Companies
VUO-IC goes beyond technical assistance, providing a viable pathway into the European electronics value chain for companies. It reduces the barrier to engaging in complex chip development, enabling companies to focus on differentiation and system value rather than infrastructure building. By bridging the gap between research and industrialization, VUO-IC ensures projects are well-balanced for industry requirements. Additionally, its ability to facilitate mixed technology domain innovation is crucial for future products spanning various sectors. Participation in VUO-IC integrates companies directly into European design and prototyping flows, aligning them with the Chips Act and enhancing their role in the European electronics ecosystem.
Towards Enhanced Value Chains in Europe
Design Enablement Teams signify a shift in Europe’s approach to semiconductor competitiveness, emphasizing coordinated capability building over isolated excellence. VUO-IC exemplifies how this concept can be effectively implemented at the national level, translating policy goals into practical delivery. For Finnish companies, VUO-IC offers a tangible path from concept to functional device on silicon. On a broader scale, it reinforces the connection between design, prototyping, and future manufacturing in Europe’s evolving electronics value chain. As complexity, heterogeneity, and system integration increase in the European electronics industry, models like VUO-IC will play a central role. VUO-IC not only serves as Finland’s Design Enablement Team but also sets a precedent for specialized ecosystems to shape Europe’s semiconductor future decisively.
VUO-IC Value Proposition for Users
A proven shortcut to complex SoCs: Access SoC templates, reusable blocks, and practical know-how for rapid development.
Industrial-grade execution, not academic guidance: Benefit from validated IP libraries and experience in delivering chips that ship.
One team across digital + RF + More-than-Moore: Cover various technology domains within one DET for streamlined project management.
A clear route to prototypes and first silicon learning: Plan for successful chip fabrication early in the process.
Single intake, clear routing, traceable delivery: Simplify project management and progress tracking through Chip Fusion’s coordination.
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